Research & Scholarly Activity

 

PATENT/DISCLOSURE LIST

(1) A. Bindal, “Sidewall Lithography for Growing Horizontal Carbon Nano Tubes and a Process Flow for Complementary Carbon Nano Tube Field Effect Transistor (CCFET) Fabrication”, provisional patent application, Oct. 2003, serial no: 60/512,137.

(2) A. Bindal, “A Self-Assisted Lithography for Manufacturing Nano-Interconnects and  Catalyst Islands for Growing Carbon Nano Tubes”, provisional patent application, Oct. 2003, serial no: 60/510,276.

(3) A. Peleg, M. Mittal, L. Mennemeier, B. Eitan, C. Dulong, E. Kowashi, W. Witt, D. Lin, A. Bindal, “An Apparatus For Performing Multiply-Add Operations on Packed Data”, Feb. 1996, No. 6,035,316.

(4) A. Bindal, “MOS Channel Device with Counterdoping of Ion Implant for Reduced Substrate Sensitivity”, Aug. 1996, No. 5,548,148.

(5) A. Bindal, C. Galli, N. Rovedo, “Thin SOI Layer for Fully Depleted Field Effect Transistors”, Nov. 1993, No. 5,264,395.

(6) A. Bindal, J. Currie, “Nitride Polish Stop for Forming SOI Wafers”, Nov. 1993, No. 5,262,346.

(7) A. Bindal, S. Ogura, “A Symmetrical FET Structure Using Reverse Sidewall Image Transfer Technique for CMO S6x (Leff = 0.1 to 0.15 um)”, Dec. 1991, Disclosure No: FI8-91-0850.

(8) A. Bindal, S. Ogura, “Self-Aligned, Double-gated, Fully-depleted SOI FET with 500 A Body Thickness”, Dec. 1991,Disclosure No: FI8-92-0008.

(9) A. Bindal, C. Galli, S. Ogura, “Sub-quarter micron Asymmetrical FET Using Sidewall Image Transfer (SIT) Technology”, Feb. 1992, Disclosure No: FI8-91 Disclosure No: FI8-91-0607.