Sang-soo Lee

Dr. Sang-Soo Lee

Email

Preferred: sang-soo.lee@sjsu.edu

Office Hours

MW 5:00-5:45 PM zoom during the pandemic, otherwise in Office: ENGR 259

Research area:

Analog & RF Integrated circuits including ADC/DAC, PLL/Frequency synthesizer for energy efficient IoT, AI/ML, image sensors, serial links, and 5G applications.

Education

PhD Carnegie Mellon University

Bio

  • Adjunct professor teaching graduate classes on Analog & RF circuits since Spring 2017
  • Accumulated 25+ years of engineering and management experiences in developing Analog/RF ICs, Image Sensors, Serdes, and communication IP and SoCs
  • Played a key role in taking Pixelplus to Nasdaq IPO as CTO of the Company
  • Served Technical Program Committee of IEEE CICC conference from 1997 to 2010

Recent Project:

4GS/s 8-bit 16-Way Time-Interleaved ADC based on asynchronous SAR ADC in 16nm FinFET technology

Links

LinkedIn Profile

Fall Semester:

EE223 Analog Integrated Circuits, MW 7:30PM-8:45PM

EE230 Radio Frequency Integrated Circuit Design II, MW 6:00PM-7:15PM

Spring Semester: 

EE288 Data Conversions/Analog Mixed Signal ICs, MW 6:00PM-7:15PM 

EE220 Radio Frequency Integrated Circuit Design I, MW 7:30PM-8:45PM