Synopsys IC Design Laboratory

The IC Design Lab was developed with equipment and curriculum grants from Intel and Synopsys for full custom analog and digital IC design and HDL software for circuit synthesis, including a physical library for placement and routing. These computers support EE courses, Senior Design Projects, and MS projects/ theses involving circuit design.

Laboratory Sponsor: Synopsys

Room Number: ENGR 291

Faculty Lab Directors
David Parent
Morris Jones

Courses
EE 166 - Design of CMOS Digital Integrated Circuits
EE 198A/B - Senior Design Project
EE 270 - Advanced Logic Design
EE 271 - Digital System Design and Synthesis
EE 272 - SoC Design & Verification with SystemVerilog
EE 287 - ASIC CMOS Design
EE 297A/B - MSEE Project
EE 299A/B - MSEE Thesis

Available Equipment